iSP

ANX2166

Timing Controller
Timing Controller
4-Lane eDP TCON with PSR2
Overview: 

The ANX2166 is an eDP 1.4b compliant TCON supporting Panel Self Refresh (PSR) and Selective Update PSR (PSR2) functions.

The ANX2166 features RapidLink™ and QuietLink™. The RapidLink feature allows for instantaneous clock recovery for no-link training wake-up and the QuietLink feature reduces DisplayPort™ (DP) voltage swing, which helps reducing power consumption.

The ANX2166 adopts the Analogix-patented low power technology of Gapless architecture.

ANX2166 can be adopted by Intel, AMD, Qualcomm, MTK platform designs.

Main Features: 
  • Resolution supported:
    • 3240x2160 10bpc @120Hz
    • 2880x1920 10bpc @144Hz
    • 2736x1824 10bpc @144Hz
    • 2496x1664 10bpc @144Hz
    • 2256x1504 10bpc @144Hz
    • 1920x1080 10bpc @240Hz
  • Color depth supported:
    • input 6/8/10bpc
    • output 6/8bpc, with 8+2 FRC
  • eDP receiver
    • Compliant with DisplayPort standard v1.3 and eDP standard v1.4b
    • Up to four lanes at 8.1Gbps
    • Support multi-link rate 8.1Gbps, 5.4Gbps, 4.32Gbps, 3.24Gbps, 2.7Gbps, 2.43Gbps, 2.16Gbps, 1.62Gbps
    • Down-spread spectrum (0.5% down spread)
  • P2P interface
  • iSP, CEDS and CEDS+ are supported
  • Up to 16 lanes to 2.6Gbps, with 1D/1C, 2D/1C and 4D/1C
  • P2P PHY output swing level control
  • TCON function
    • GD-IC /GIP/Overlap driving/Multi driving/4,6,8 phase simple GIP flexible gate timing through GPIO, configurable by register
    • Power-on gate output masking to avoid DC/DC over-loading
    • Programmable Fail-safe mode control
  • HDR400 supported with global dimming
  • Power supply: 1.8V/0.9V (3.3V generated internally for HPD output)
  • Package: 7x16 112-pin BGA; package size: 5.0×11×0.82mm (W×L×H)

eDP