DP 1.1a

Dual-mode DP/HDMI Transmitter IP

IP
IP Core
Overview: 

DisplayPort和HDMI传输技术属于高度复杂的混合信号设计,要求高性能模拟设计(均衡器、锁相环(PLL)、延迟锁相环(DLL)、CDR等)和复杂的逻辑设计(HDCP引擎、TMDS解码器、视频和音频数据处理等) 。

双模式DisplayPort发送器核心IP完全符合DisplayPort 1.1a和HDMI 1.3标准,符合备HDCP内容保护规范。核心IP提供提供全部DisplayPort源设备插座信号求。在HDMI模式下,双模式发送器核心IP完全符合HDMI 1.3标准要求。此设备支持Deep Color,每像素36位色。 此外,HDMI模式还支持外部DisplayPort至HDMI电平转换插头适配器。

 

Main Features: 
Video Interface
  • Deep Color最高支持36bpp
  • EIA/CEA-861D视频定时和信息帧结构
  • SDR(单时钟边沿)和DDR(双时钟边沿)支持24/30/36/48位像素视频模式
  • YCbCr转RGB色彩空间转换
  • 向后兼容DVI 1.1
  • 内置自检模块(BIST)
Digital Audio Interface
  • S/PDIF和I2S输入支持PCM、杜比数字、DTS数字音频传输
  • 音频采样率:32kHz~192kHz 
  • 可编程I2S通道映射 
  • 兼容IEC60958或IEC61937
Other key features
  • TMDS时钟频率高达270MHz
  • 支持使用标准型外部电缆适配器进行HDMI或DVI输出
  • 主链路包含4条物理lane,每lane 2.7/1.62 Gbps
Package: 

N/A

Standards Compliance: 

DisplayPort 1.1a

HDMI 1.3 with HDCP 1.2

HDMI 1.2

Power Requirements: 

N/A

Detailed Product Information: 

DisplayPort 1.1a Transmitter

IP
IP Core
Overview: 

DisplayPort发送器的IP核技术完全符合DisplayPort 1.1a标准和HDCP内容保护规范。其核心IP提供全部DisplayPort源设备插座信号要求。在HDMI模式下,它需要用到外部DisplayPort转HDMI转换器。

硅谷数模DisplayPort发送器核心IP包含36位视频数据,时钟信号作为视频输入,SPDIF和I2S输入作为音频输入,视频数据采集和视频BIST块分为video_capture和video_bist模块。

Main Features: 
Video Interface
  • EIA / CEA-861D视频定时和信息帧结构
  • VESA DMT和CVT定时标准
  • Deep Color最高支持36bpp
  • 内置自检模块(BIST)
Digital Audio Interface
  • S/PDIF和I2S输入支持PCM、杜比数字、DTS数字音频传输
  • 兼容IEC60958或IEC61937
  • 音频采样率:32kHz~192kHz
Other key features
  • 主链路包含4条物理lane,每lane 2.7/1.62 Gbps
  • APB 3.0总线接口,用于IP配置/状态寄存器访问
Package: 

N/A

Standards Compliance: 

DisplayPort 1.1a

Power Requirements: 

N/A

Detailed Product Information: 

DisplayPort 1.1a Transmitter

IP
IP Core
Overview: 

The DisplayPort Transmistter IP core is fully compliant with DisplayPort 1.1a with HDCP content protection specifications. The IP core provides all the signal requirements for the DisplayPort source device receptacle. For HDMI mode it requires the use of an external DisplayPort-to-HDMI converter.

Analogix DisplayPort Transmitter IP core contain the 36-bit video data and clock are video inputs, the SPDIF and I2S inputs are taken as audio input, the video data capture & video BIST block is separated as video_capture and video_bist module.

Main Features: 
Video Interface
  • EIA/CEA-861D video timing and info-frame structure
  • VESA DMT and CVT timing standards
  • Deep color support up to 36bpp
  • Built-in Self Test (BIST)
Digital Audio Interface
  • S/PDIF and I2S input supports PCM, Dolby Digital, DTS digital audio transmission
  • IEC60958 or IEC61937 compatible
  • Audio sampling rates from 32kHz to 192kHz
Other key features
  • Main link containing 4 physical lanes of 2.7/1.62 Gbps/lane
  • APB 3.0 bus interface for IP configuration/status register access
Applications: 

Accessories

Notebook/Desktop PC

Smartphone/Tablet

Package: 

N/A

Standards Compliance: 

DisplayPort 1.1a

Power Requirements: 

N/A

Detailed Product Information: