How demanding is virtual reality (VR) for display technology? At the High-Speed Connectivity and Display Technology Seminar, Pimax Technology CEO Ong Zhibin said that virtual reality products should support at least 4K picture quality, so the resolution and refresh rate requirements are very high for VR equipment, PPI supports more than 1000, refresh rate of 144Hz or more, and future requirements will be even higher.
" Both high resolution and high refresh rate put higher demand on the data bandwidth of the system. In order to meet the needs of different display equipment, there is a variety of standards in the industry, such as DisplayPort, HDMI, MIPI, etc., and most use high-speed serial bus (SEDES) technology. In recent years, SEDES is the representative of the rapid development of high-speed I/O technology. Li Kai, a senior technical consultant at Keysight Technology, says the trend for high-speed I/O buses is threefold, with higher speeds, more channels and more complexity, and is almost doubling every four or five years in terms of speed.

In 2019, USB4, PCIe5.0 and other high-speed I/O technical standards have been updated intensively, which means that the high-speed I/O interface speed will jump from under 10Gbps for a single channel to more than 10Gbps. Take USB4 for example, as a new generation of USB technology specifications introduced by the USB standard organization USB-IF at the end of August 2019, USB4 supports a maximum 40Gbps transmission rate, which can drive two 4K displays simultaneously. USB4 supports a variety of data and display protocols (DisplayPort, PCIe, etc.) to effectively share maximum bandwidth. In addition, USB4 is also back-to-back compatible with USB 3.2, USB 2.0, and supports Thunderbolt 3. In the words of David Lee, director of field applications engineering at Fresco Logic, in the USB4 era, USB was not just the standard for transmitting data, but a whole new pathway you could take, whether it’s audio, video, or data and USB4 is expected to dominate the world," says David Lee.
The USB4 protocol further reduces the difficulty of system design, and with just USB-C port connections, you can achieve almost all the external interface system functions.
But this does increase the complexity of chip design at the expense of support, as chips will require more complex signal modulation mechanisms, more complex pre-emphasis processing methods, but it will also be more difficult to achieve performance, power consumption and cost balance. However, in terms of signal integrity, USB4 poses a greater challenge to system design.

Joseph Juan, senior marketing manager at Analogix Semiconductor, has previously stated that high-speed signals get severely distorted when transmitted over cables or PCBs. Transmission lines between 25 cm and 30 cm in length can have in-channel insertion losses of 20dB or more.
In addition, reflection, crosstalk, noise, and jittering can all cause the signal integrity to deteriorate, and if the signal integrity drops too much, the transmitted signal will eventually not be successfully recovered at the receiving end. At the seminar, Xiao Yong, senior director of systems engineering at Analogix Semiconductor, also gave an example of a smartphone PCB where the signal travels only 8 to 16 centimeters from an application processor to a DisplayPort interface, but it can cause an 8 to 10dB attenuation of the DisplayPort signal.
At this point, the channel rate can only be reduced from the standard 8.1Gbps to 5.4Gbps for proper transmission. In order to reduce signal quality attenuation, repeaters must be added to the high-speed serial link to restore signal quality losses, filter out random noise and system noise, and enable the signal output after the repeater to meet the specification requirements.

There are currently two types of repeaters: Retimer and Redriver. The retimer not only equalizes the upstream signal to compensate for the loss in the transmission line, but also uses the clock data recovery (CDR) circuit to restore the clock, and thus reorganizes each bit of data, eventually transmitting the signal from the signal mass recovery to the downstream channel.
The redriver only equalizes the upstream signal and does not contain the CDR circuit, so no clock recovery and data re-engineering are performed.
Compared to a redriver, a retimer has significant advantages, such as adaptive equalization, CDR and signal recombination, filtering out random jitter, restoring the entire link loss, being the most operable without compromising data quality, and low power consumption, Xiao Yong said. In the case of a USB C cable connection, assuming that its system loss budget is 23dB, an 80 cm USB-C cable could cause the system to lose more than 23dB without a retimer.

With the addition of a retimer, the loss margin of 23dB can be basically maintained across the full link. Although the above case is based on USB 3.2 or DisplayPort connection, for USB4 systems the principle is the same.

Therefore, the deployment of retimers in the signal channel can break through the performance limitation of board-level connection to the high-speed serial bus, and achieve the performance as described by the new specification of high-speed serial connection on the basis of reducing the difficulty of board-level design.